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Altera

FPGA Silicon Validation Engineer

Bengaluru, Karnataka, IndiaIndia
POSTED 2 NOVVERIFIED 3H AGO
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Role
7 days opentrue age
Past the 3d median close
Posted 2 Nov · n=12
Pay
₹22.5L–₹29.2Lno pay posted
Market p25–p75
₹22.5L–₹29.2L
Bengaluru · n=5 · 365d to 6 Nov
CompanyAltera →
197open roles
Opened · 30d
+14
Closed · 30d
−22
6d of snapshots · 30d window
Market
37,386open · Software engineering
Opened · 7d
+1,5694% of open
All software engineering
74,955open
All tracked boards · live 9 Nov · n=37,386

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Source · AlteraFirst seen 4 NovOriginal ↗