# Senior Digital Verification Engineer at Omni Design Technologies

> Hybrid · India · Senior · Software engineering · open. Source: https://alderhq.app/jobs/lever%3Aomnidesigntech%3A11294438-89ac-41ab-95e1-55128e99aa2d (read 2026-11-06).

## Facts (observed)

- Company: [Omni Design Technologies](https://alderhq.app/companies/omni-design-technologies)
- Location text: Bangalore
- Where it can be done from (inferred): Hybrid · India (evidence: "Location lists "bangalore"")
- Posted: 2021-06-12 (1972 days ago)
- First seen by alder: 2026-11-02 · last verified: 2026-11-04
- Reposted: 0 times · edited: 0 times
- Apply on the employer's site: https://jobs.lever.co/omnidesigntech/11294438-89ac-41ab-95e1-55128e99aa2d
- Skills listed (inferred): Python

## Pay and sponsorship

- Posted pay: not posted
- Market band for similar posted roles (Bengaluru, n 4): p25 ₹40.9L, median ₹53.8L, p75 ₹65.4L
- H-1B filings at this company for similar roles, FY26: 1 ([US DOL OFLC LCA disclosure data](https://www.dol.gov/agencies/eta/foreign-labor/performance))

## Description (the employer's text)

We are looking for an experienced digital verification engineer, who is capable of driving the required verification flows for our mixed-signal designs. The ability to work closely with rtl design team and the analog team, and to develop detailed verification flows, is a key feature of this role!

### Qualifications

- You will be part of a Verification Team.
- You will be responsible for driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases.
- You will be responsible for analysing Code Coverage, Functional Coverage and Assertions.
- Use industry standard tools, methodologies.
- Solid experience in verification of complex SoCs.
- Expertise in SoC Verification using SV and Verilog. Knowledge of UVM is a plus.
- Expertise in Test Plan creation and Verification technologies like Code Coverage, Functional coverage, assertion based verification.
- Verification experience in complex datapath, DSP based ASICs is highly desirable.
- Good knowledge in gate-level simulation, and Scripting languages like Python, TCL.
- Excellent debugging and problem solving skills.
- Strong communication skills.
### Education and Experience

- B.E./B.Tech./M.E./M.Tech in VLSI
- Minimum of 5 years of working experience in Digital Verification/Formal Verification flow of a product company.
- Candidate must have working experience System Verilog/UVM based verification flow.
We are looking for trailblazers ...

We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design’s IP cores and the rapidly emerging semiconductor embedded design business ecosystem.

At Omni Design, we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring Omni Design’s vision to fruition.

If you are interested in making an impact as part of a young, fast growing, cutting edge technology company, please reach out to us.

Omni Design is an equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence.

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Data: alder (https://alderhq.app). Cite https://alderhq.app/jobs/lever%3Aomnidesigntech%3A11294438-89ac-41ab-95e1-55128e99aa2d and the date you read it. Observed facts come from the employer's own listing; location reach, level, family and skills are inferences.