Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo’s fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states.

Waymo is seeking versatile Software Engineers to join our Compute Software team in Bangalore. As part of a high-impact systems engineering team, you will design, build, and scale the critical software infrastructure and runtime components that connect our autonomous driving technology with next-generation custom silicon and compute platforms.

In this role, you will work across the compute system lifecycle, architecting robust C++ software, developing scaleable Hardware-in-the-Loop (HIL) automation harnesses, driving system qualification across hardware revisions, and optimizing software performance for autonomous vehicle platforms.

This role follows a hybrid schedule and reports to Staff ML Compiler Engineer.

You will

Software Architecture: Design, build, and maintain high-performance C++ software, runtime components, and diagnostic tools supporting custom silicon and compute platforms
Test Infrastructure: Build and scale robust Hardware-in-the-Loop (HIL) test harnesses, automated regression frameworks, and CI/CD pipelines across the compute stack (firmware, kernel, runtime, and compilers)
Qualification and Reliability: Drive qualification workflows, automated regression suites, and release readiness verification across multiple hardware revisions and platform configurations
System Debugging: Troubleshoot and root-cause complex software-to-hardware communication issues, concurrency bugs, and performance bottlenecks across physical lab hardware and emulation environments
Cross-functional Collaboration: Partner closely with hardware design, silicon validation, compiler, and vehicle platform teams to translate technical specifications into production-grade software solutions
Tooling & Velocity: Develop modular developer tooling, telemetry monitors, and automated workflows to accelerate qualification velocity and software reliability

You have

Education & Experience: Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, Computer Engineering, or related technical field (or equivalent practical experience) with 5+ years of industry experience
C++ Proficiency: Strong proficiency in modern C++, backed by solid software engineering fundamentals (data structures, algorithms, object-oriented design, and modular architecture)
Systems & Infrastructure: Experience designing systems software, software testing methodologies, or scaleable test automation frameworks
Development Environment: Hands-on experience with Linux/Unix environments, build systems, scripting (Python/Bash), and modern CI/CD / version control workflows
Debugging & Problem Solving: Strong analytical and debugging skills, with a proven track record of diagnosing complex issues across software/system boundaries
Adaptability: Demonstrated curiosity and willingness to learn low-level hardware interfacing, embedded systems concepts, or compiler optimizations on the job

We prefer

For the Silicon & Validation Track

Experience with Hardware-in-the-Loop (HIL) setups, automated lab testbeds, or embedded test environments
Prior experience in post-silicon validation, System-Level Testing (SLT), ASIC bring-up, or diagnostic software development
Exposure to hardware-software interfacing (e.g., Memory-Mapped I/O, device drivers, firmware, POSIX APIs, bare-metal/RTOS)
Knowledge of standard hardware communication protocols (e.g., PCIe, I2C, SPI, UART, JTAG) or compute IP blocks (DDR, DMA)