# Staff Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU at Samsung > United States · Staff · ML / AI · open. Source: https://alderhq.app/jobs/greenhouse%3Asamsungsemiconductor%3A7967361003 (read 2026-11-06). ## Facts (observed) - Company: [Samsung](https://alderhq.app/companies/samsung) - Location text: San Jose, California, United States; SSI San Jose - Where it can be done from (inferred): United States (evidence: "Location: San Jose, California, United States; SSI San Jose") - Posted: 2026-08-26 (72 days ago) - First seen by alder: 2026-11-02 · last verified: 2026-11-04 - Reposted: 0 times · edited: 0 times - Apply on the employer's site: https://job-boards.greenhouse.io/samsungsemiconductor/jobs/7967361003 ## Pay and sponsorship - Posted pay: $163k–$253k per year (from the listing's pay field) - Market band for similar posted roles (SF Bay Area, n 170): p25 $246k, median $275k, p75 $300k ## Description (the employer's text) Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World’s Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities. Staff Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU ### What You’ll Do Architecture Research Lab is focused on researching next-generation CPU (RISC-V) microarchitecture and performance for emerging computing workloads. We explore new architectural ideas, evaluate their performance potential, and rapidly turn promising concepts into working designs that can be validated on real silicon. Our research is driven by emerging opportunities in data center and agentic AI workloads, where we investigate how CPU architecture can evolve to meet new performance and efficiency requirements. We also explore CPU-memory co-design from the CPU perspective, in alignment with the broader shift toward memory-centric architectures. A distinctive aspect of our team is the way we approach architecture research. We develop and apply AI-driven methodologies to accelerate architectural exploration, broaden the design space we can investigate, and quickly iterate from ideas to implementation and silicon validation. Rather than simply following established design flows, we continuously seek new ways to explore, evaluate, and realize CPU architectures. The role offers an opportunity to work across the full spectrum of architecture research—from workload and performance analysis, microarchitectural innovation, and architectural modeling to implementation and silicon validation—while helping shape new methodologies for how future CPUs are designed. Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 43004 As a Staff CPU Architecture & Performance Engineer, you will shape the architecture and performance direction of next-generation CPU architectures. You will identify opportunities across emerging workloads, develop and refine performance models, evaluate system-level architectural trade-offs, and drive new microarchitectural concepts from research to implementation. You will work closely with RTL design teams to translate architectural concepts into implementable designs, guide key technical decisions, and validate their impact from modeling through silicon. The role offers broad ownership across architectural domains, with the opportunity to define new research directions, influence CPU architecture strategy, and drive ideas that can deliver meaningful performance gains in real hardware. - Propose new architecture ideas and take ownership of one or more microarchitectural domains, including front-end, mid-end, and back-end - Use AI-driven design methodologies to rapidly implement architectural ideas and validate them on real silicon - Build, extend, and validate performance models and architectural simulators - Perform CPI/IPC analysis and identify root causes of performance bottlenecks - Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models - Characterize workloads and benchmarks, including SPEC, server, client, AI/ML, agentic AI, and internal traces - Translate performance analysis and modeling results into architectural direction and design decisions - Drive research leading to patents and technical publications ### What You Bring - Master’s degree in Computer Engineering, Computer Science, or a related field with 8+ years of relevant experience, or PhD with 5+ years of relevant experience --- Data: alder (https://alderhq.app). Cite https://alderhq.app/jobs/greenhouse%3Asamsungsemiconductor%3A7967361003 and the date you read it. Observed facts come from the employer's own listing; location reach, level, family and skills are inferences.