# CPU Design Architect / Principal Digital Design Engineer at Baidu USA

> United States · Principal · Software engineering · open. Source: https://alderhq.app/jobs/greenhouse%3Abaidu%3A4499671 (read 2026-11-04).

## Facts (observed)

- Company: [Baidu USA](https://alderhq.app/companies/baidu-usa)
- Location text: Sunnyvale, CA; Sunnyvale, CA
- Where it can be done from (inferred): United States (evidence: "Location: Sunnyvale, CA; Sunnyvale, CA")
- Posted: 2022-08-22 (1535 days ago)
- First seen by alder: 2026-11-02 · last verified: 2026-11-04
- Reposted: 0 times · edited: 0 times
- Apply on the employer's site: https://job-boards.greenhouse.io/baidu/jobs/4499671
- Skills listed (inferred): Node.js

## Pay and sponsorship

- Posted pay: not posted
- Market band for similar posted roles (SF Bay Area, n 168): p25 $227k, median $270k, p75 $320k

## Description (the employer's text)

### Job Description

Design cost effective controller with high performance, low power and small area for cellular modem. This position will work with multi-nation teams in leading-edge process node and be involved in:

- Perform CPU development and design integration for MIPS CPU subsystem.

- Explore latest technologies and be responsible for conducting fundamental research on new directions in CPU architecture

- Contribute ideas for advanced CPU performance features - analyze workloads in details, identify performance bottlenecks and opportunities, bring a data driven approach to tradeoffs in CPU design, derive architecture and micro-architecture to design/model implantation team, and bring ideas to successful silicon

### Minimum Qualifications

- Master Degree in Electrical Engineering, Computer Science or Computer Engineering.

- At least 5 years of CPU related Architect/RTL/Verification/Implementation design experience

- Knowledge and practical experience with common RISC CPU architecture.

- Familiarity with chip digital design flow, including RTL integration, simulation, STA.

- Understanding of high performance techniques and trade-offs in a CPU microarchitecture

- Ability to problem solve and prove own ideas

Preferred Qualifications:

- PhD in Electrical Engineering, Computer Science or Computer Engineering is a PLUS

- 8+ years of CPU related Architect/RTL/Verification/Implementation design experience

- Strong CPU architecture knowledge and micro-architecture knowledge

- Familiarity with Symmetric Multi-processing (SMP) and Snoop-based multi-processor architecture.

- Familiarity with synthesis, power analysis and post silicon debugging

- Cross-site working experience is a PLUS.

- Common knowledge in modeling/DV/OS is a PLUS.

- Experience with Foundry, Post-Silicon, FPGA, DVT, SLT debug is a PLUS.

#LI-DNI

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Data: alder (https://alderhq.app). Cite https://alderhq.app/jobs/greenhouse%3Abaidu%3A4499671 and the date you read it. Observed facts come from the employer's own listing; location reach, level, family and skills are inferences.
