# Senior Packaging Integration Lead at Astera

> United States · Staff · Software engineering · open. Source: https://alderhq.app/jobs/greenhouse%3Aasteralabs%3A4735854005 (read 2026-11-05).

## Facts (observed)

- Company: [Astera](https://alderhq.app/companies/astera)
- Location text: San Jose, California, United States; San Jose
- Where it can be done from (inferred): United States (evidence: "Location: San Jose, California, United States; San Jose")
- Posted: 2026-09-22 (44 days ago)
- First seen by alder: 2026-11-02 · last verified: 2026-11-04
- Reposted: 0 times · edited: 0 times
- Apply on the employer's site: https://job-boards.greenhouse.io/asteralabs/jobs/4735854005

## Pay and sponsorship

- Posted pay: not posted
- Market band for similar posted roles (SF Bay Area, n 851): p25 $206k, median $240k, p75 $281k
- H-1B filings at this company for similar roles, FY26: 1 ([US DOL OFLC LCA disclosure data](https://www.dol.gov/agencies/eta/foreign-labor/performance))

## Description (the employer's text)

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Job Description

We are seeking a Senior Packaging Integration Lead to serve as the single-threaded packaging owner for one or more of Astera Labs’ advanced connectivity products. This role owns the end-to-end packaging solution from customer requirements and package architecture definition through development, qualification, and production ramp & represents packaging across the customer, internal cross-functional teams, business units, and the OSAT, foundry, and substrate supply base.

This is a senior individual-contributor technical leadership role who can set packaging technical direction, make architecture and technology-selection decisions, and drive alignment across stakeholders without direct authority. You will partner with packaging leadership on strategy while owning the technical direction for your products — defining package architecture and test vehicles to de-risk technology, and guiding execution engineers and external partners to deliver robust, manufacturable packages on schedule.

Key Responsibilities

- Own the packaging solution end-to-end for assigned products — serve as the single point of accountability from a packaging standpoint across definition, development, qualification, and production ramp
- Act as the primary packaging interface to the customer: capture and translate customer packaging, mechanical, thermal, SIPI, and reliability requirements into package architecture, specifications, and a clear execution roadmap
- Define package architecture, structure and technology selection (e.g., 2.5D/3D integration, chiplet/interposer, CoWoS-class, organic substrate) with feasibility, cost, performance, and manufacturability trade-off analysis
- Define and drive test vehicle (TV) strategy and requirements to de-risk new package technology, characterize interconnect/SIPI performance, and validate assembly and reliability ahead of product builds
- Represent packaging across internal cross-functional teams — silicon design, package design, SIPI, thermal, product engineering, test engineering, validation, quality, and operations — and align packaging requirements to product and business-unit roadmaps
- Partner with product planning, architecture, and program management on product roadmap, packaging feasibility, technology readiness, cost targets, and schedule commitments
- Set technical direction with OSAT, foundry & substrate partners — driving technology selection, design-rule alignment, and development roadmaps across the supply base
- Own package definition deliverables and sign-offs, including POR/TOR, design rules, stack-up, package BOM, DFM alignment, and pre-tape-out design-integration readiness
- Drive risk identification, technology-gap closure, and mitigation across the product’s packaging roadmap; escalate and resolve critical cross-functional and supplier issues with urgency.
- Communicate packaging status, risks, and key decisions to executive leadership, customers, and cross-functional stakeholders & external partners.
Basic Qualifications

- B.S. or M.S. in Materials Science, Electrical Engineering, Mechanical Engineering, Chemical Engineering, or a related discipline; advanced degree preferred.
- 5-7+ yrs of experience in advanced packaging technologies such as 2.5D/3D integration, TSV, chiplets, and interposers. Optical / co-packaged optics experience is a plus.

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