Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

System Validation Engineer

Role Overview

Astera Labs is seeking System Validation Engineers to lead post-silicon bring-up and system validation for high-performance PCIe fabric switch products used in AI and cloud data centers. As part of the AI Fabric Engineering group, you will design and execute validation plans, automate data-centric test flows, drive root-cause investigations across silicon, firmware, hardware, and systems, and work directly with customers to validate real-world performance and interoperability.

Based in San Jose, you will collaborate with cross-functional teams to certify products against demanding system requirements and prepare new silicon and platforms for customer integration and launch. This is an opportunity to help shape validation strategy, automation infrastructure, and debug methodologies for purpose-built connectivity solutions enabling rack-scale AI infrastructure.

Success Looks Like

New silicon and platforms are brought up on schedule with reproducible validation results.
Automated test suites reduce manual effort and provide clear pass/fail, compliance, and performance metrics.
System issues are resolved rapidly through data-backed root-cause analysis, with strong technical communication and customer satisfaction during integration.

Key Responsibilities

Validation Planning & Strategy

Create comprehensive validation plans for AI fabric switch products covering functionality, performance, reliability, stress, and interoperability.
Translate customer and system requirements into measurable test objectives, coverage goals, and product certification criteria.
Contribute to PCIe compliance testing strategies and adapt consortium test cases for execution from x86 and ARM platforms.
Produce clear, data-driven validation reports, status updates, and specification-compliance assessments for internal stakeholders and customers.

Silicon & System Bring-Up

Lead silicon and platform bring-up activities, verifying boot and runtime behavior on x86 and ARM systems.
Ensure timely readiness for customer engagements, product demonstrations, and product launches.
Debug complex issues across PCIe, NVMe, Ethernet, firmware, hardware, and system layers using protocol analyzers, logic analyzers, in-circuit debuggers, and CPU-based tool suites.
Design experiments to isolate unexpected behavior and drive root-cause resolution across silicon, firmware, hardware, software, and platform configuration.

Test Automation & Infrastructure

Develop robust, repeatable Python automation for IC and board testing, with emphasis on execution efficiency, test orchestration, data collection, analysis, and automated reporting.
Build scalable validation infrastructure that supports repeatable experiments, clear pass/fail criteria, performance characterization, and regression coverage.
Improve validation workflows and debug tools to reduce manual effort and accelerate issue resolution.

Customer & Cross-Functional Collaboration

Collaborate directly with customers to capture system requirements, reproduce customer scenarios, and demonstrate product capabilities.
Drive cross-functional root-cause analysis with silicon, firmware, hardware, software, product, and applications teams; document findings and corrective actions.