# Electrical Engineering Lead at Bridge Neurotech > Onsite · United States · Staff · Software engineering · open. Source: https://alderhq.app/jobs/ashby%3Abridgeneurotech%3Ad6aba64b-dbd7-468b-be93-451ca3fca0d3 (read 2026-11-05). ## Facts (observed) - Company: [Bridge Neurotech](https://alderhq.app/companies/bridge-neurotech) - Location text: Redwood City - Where it can be done from (inferred): Onsite · United States (evidence: "Location: Redwood City") - Posted: 2026-10-12 (23 days ago) - First seen by alder: 2026-11-02 · last verified: 2026-11-04 - Reposted: 0 times · edited: 0 times - Apply on the employer's site: https://jobs.ashbyhq.com/bridgeneurotech/d6aba64b-dbd7-468b-be93-451ca3fca0d3 - Skills listed (inferred): Python ## Pay and sponsorship - Posted pay: not posted - Market band for similar posted roles (SF Bay Area, n 851): p25 $206k, median $240k, p75 $281k ## Description (the employer's text) ### About Bridge Neurotech Bridge Neurotech is building a non-invasive functional ultrasound imaging (fUSI) platform with AI-based neural decoding for brain-computer interface applications. We are a seed-stage neurotechnology company developing technology that has the potential to transform how we interact with the human brain. ### About the role We are looking for an Electrical Engineering Lead to own the architecture strategy and delivery of the electronic systems behind Bridge’s custom ultrasound hardware: from system partitioning and component selection through schematic, layout, bring-up, and validated hardware. Two design challenges sit at the center of this role. The first is high-speed I/O: moving raw acquisition data off the front-end over multi-gigabit-per-second links, with a focus on designing for signal integrity, clocking, and proper layout. The second is power delivery: multi-rail systems operating at watts of power, designed for efficiency and thermal headroom. You will interface with ASICs at register level, write Python daily for bring-up and test automation, and know enough firmware to collaborate efficiently with our embedded systems team. ### What you’ll do Own the end-to-end electronics architecture of Bridge’s custom imaging hardware: system partitioning, component selection, schematic capture, PCB layout oversight, bring-up, and design validation. Design and deliver boards with multi-gigabit-per-second serial links (e.g., LVDS, JESD204, PCIe/USB 3.x-class SerDes), owning signal integrity, impedance control, clocking, and high-speed layout. Architect watts-class power delivery: multi-rail regulation, sequencing, efficiency, thermal design, and noise isolation for sensitive analog acquisition circuitry. Evaluate, select, and integrate ultrasound transmit/receive ASICs and analog front-ends: own the electrical interface to custom silicon and drive vendor relationships. Co-define the hardware/software boundary with the Embedded Systems Lead: digital interface definition, control plane, and data path. Write firmware where it accelerates bring-up. Build Python-based bring-up, characterization, and automated test tooling for every board revision. Lead board bring-up, debug, and failure analysis; manage PCB fabrication and assembly vendors and drive design reviews. Mentor the R&D Engineer, reviewing their schematics, layouts, and test methodology. Lay the documentation and design-control groundwork for eventual development in a regulated environment. ### Who you are ### Required Degree in electrical engineering or related field, with 6+ years of hands-on board-level design experience and multiple custom boards taken through production or production-equivalent builds. Extended experience with high-speed digital board design: multi-gigabit-per-second serial links, controlled-impedance routing, and signal/power integrity analysis. Demonstrated design of power delivery systems operating at watts of power: switching regulators, multi-rail architectures, sequencing, and thermal management. Working understanding of ASICs and how to interface with them: register-level configuration, electrical integration of custom silicon or analog front-ends, and informed dialogue with silicon vendors. Enough firmware fluency to write some embedded code yourself and work effectively day-to-day with an embedded systems engineer. Good command of Python for bring-up scripts, automated test, and data analysis. Experience from consumer electronics or other high-volume consumer products, where cost, manufacturability, and iteration speed were real constraints. ### Nice to have Familiarity with hardware design in regulated environments (e.g., IEC 60601, design controls, medical or similar). Prior work on ultrasound, imaging, or other high-channel-count data acquisition front-ends, including AFE/ADC characterization. FPGA familiarity, enough to reason about the interface between your boards and programmable logic. EMC/EMI pre-compliance and debug experience. Early-stage startup experience where you set the hardware roadmap yourself. --- Data: alder (https://alderhq.app). Cite https://alderhq.app/jobs/ashby%3Abridgeneurotech%3Ad6aba64b-dbd7-468b-be93-451ca3fca0d3 and the date you read it. Observed facts come from the employer's own listing; location reach, level, family and skills are inferences.