# DV Intern at Etched > Onsite · United States · Intern · Other · open. Source: https://alderhq.app/jobs/ashby%3AEtched%3Adacedaca-c4ca-4964-85a7-8df1738005bb (read 2026-11-05). ## Facts (observed) - Company: [Etched](https://alderhq.app/companies/etched) - Location text: San Jose - Where it can be done from (inferred): Onsite · United States (evidence: "Location: San Jose") - Posted: 2026-02-07 (272 days ago) - First seen by alder: 2026-11-02 · last verified: 2026-11-04 - Reposted: 0 times · edited: 0 times - Apply on the employer's site: https://jobs.ashbyhq.com/Etched/dacedaca-c4ca-4964-85a7-8df1738005bb - Skills listed (inferred): Python, LLMs ## Pay and sponsorship - Posted pay: not posted - Market band for similar posted roles (SF Bay Area, n 141): p25 $60k, median $83k, p75 $130k - H-1B filings at this company for similar roles, FY26: 1 ([US DOL OFLC LCA disclosure data](https://www.dol.gov/agencies/eta/foreign-labor/performance)) ## Description (the employer's text) ### About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. ### Job Summary As a Design Verification intern, you will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. We are looking for Spring '27, and Summer '27 interns. ### You may be a good fit if you have Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field. Familiarity with high-speed digital logic Exposure to ASIC or SoC design concepts Familiarity with SystemVerilog, UVM, or Python Familiarity with verification work and writing test benches Familiarity with physical design flows and tooling Are able to learn quickly about transformers and other aspects of modern artificial intelligence ### Strong candidates may also have experience with Familiarity with modern ML and LLM model architectures UVM or formal verification experience ​Ability to program with Python or another scripting language We encourage you to apply even if you do not believe you meet every single qualification. ### Program details 12-week paid internship Generous housing support for those relocating Daily lunch and dinner in our office Based at our office in San Jose, CA Direct mentorship from industry leaders and world-class engineers Opportunity to work on one of the most important problems of our time For any questions, contact internships@etched.com ### How we’re different Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed. --- Data: alder (https://alderhq.app). Cite https://alderhq.app/jobs/ashby%3AEtched%3Adacedaca-c4ca-4964-85a7-8df1738005bb and the date you read it. Observed facts come from the employer's own listing; location reach, level, family and skills are inferences.