# Sifivecareers

> Hiring pulse for Sifivecareers: open postings over time. Source: https://alderhq.app/companies/sifive-wd1-sifivecareers (read 2026-11-09).

## Hiring (observed)

- Open roles: 15
- New postings: 0 in 30 days, 0 in 90 days
- Taken down: 0 in 30 days
- Board last checked: 2026-11-07

## Pay and sponsorship

- Open roles with pay posted: 0 of 15
- No sponsorship records matched yet

## Open roles (newest 15)

- [Sr Engineer - Physical Design](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%2029%20Days%20Ago) · India
- [Sr Director, SW Product Management](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%20Yesterday) · Location unclear
- [Linux Kernel Architect](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%202%20Days%20Ago) · Location unclear
- [Senior RTL Design Engineer - CPU Frontend](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%203%20Days%20Ago) · Location unclear
- [CPU Design Verification Engineer II](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%205%20Days%20Ago) · India
- [Staff CPU Design Verification Engineer](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%208%20Days%20Ago) · India
- [Staff Design Verification Engineer – Coherent Interconnect (CHI)](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%209%20Days%20Ago) · Location unclear
- [Sr Staff Static Timing Analysis (STA) Lead](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%2011%20Days%20Ago) · India
- [In-Order Tile TestBench Design Verification Engineer](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%2012%20Days%20Ago) · India
- [Senior Workday HRIS Specialist](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%2015%20Days%20Ago) · United States
- [Staff RTL Design Engineer - Cache Subsystem](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%2017%20Days%20Ago) · Taiwan
- [Security Engineer](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%2018%20Days%20Ago) · India
- [Senior Staff Design Verification Engineer – Coherent Interconnect](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%2023%20Days%20Ago) · Location unclear
- [Senior Customer Support Engineer, Physical Design](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%2026%20Days%20Ago) · India
- [Principal Field Application Engineer](https://alderhq.app/jobs/workday%3Asifive~wd1~sifivecareers%3APosted%2030%2B%20Days%20Ago) · China

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Data: alder (https://alderhq.app). Cite https://alderhq.app/companies/sifive-wd1-sifivecareers and the date you read it. Hiring pulse counts postings, not headcount.