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Global · updated 2h ago

Architect Labs

Open roles
15
Remote anywhere
0
Opened · 30d
+0
Countries
2

Hiring pulse

Hiring pulse · Learning · 2/7
Open rolesRemovedobserved

Open roles

Special Projects
Palo Alto19h ago
Onsite · United States
Member of Technical Staff - ML Research
Palo Alto8mo ago
Onsite · United States
Member of Technical Staff - Research Intern
Palo Alto8mo ago
Onsite · United States
Member of Technical Staff - Microarchitectural Validation
Palo Alto3mo ago
Onsite · United States
Member of Technical Staff - Software
Palo Alto5mo ago
Onsite · United States
General Application
Palo Alto6mo ago
Onsite · United States
Member of Technical Staff - AI for Chip Design
Palo Alto6mo ago
Onsite · United States
Member of Technical Staff - Formal Methods
Palo Alto5mo ago
Onsite · United States
Microarchitect / RTL Design - Interconnect & Fabric
Palo Alto2mo ago
Onsite · United States
Microarchitect / RTL Design - Memory Subsystem
Palo Alto2mo ago
Onsite · United States
Member of Technical Staff - Formal Verification
Palo Alto2mo ago
Onsite · United States
Member of Technical Staff - Physical Design
Palo Alto1mo ago
Onsite · United States
Chief Architect
Palo Alto5d ago
Onsite · United States
Vice President of ASIC Engineering
Palo Alto5d ago
Onsite · United States
Member of Technical Staff - Microarchitectural Validation
Bangalore, India3mo ago
Onsite · India
Member of Technical Staff - Microarchitect / RTL Design
Palo Alto; Bangalore, India6mo ago
Onsite · United States
Special Projects—19hOnsite · United States
Member of Technical Staff - ML Research—265dOnsite · United States
Member of Technical Staff - Research Intern—265dOnsite · United States
Member of Technical Staff - Microarchitectural Validation—91dOnsite · United States
Member of Technical Staff - Software—161dOnsite · United States
General Application—200dOnsite · United States
Member of Technical Staff - AI for Chip Design—194dOnsite · United States
Member of Technical Staff - Formal Methods—174dOnsite · United States
Microarchitect / RTL Design - Interconnect & Fabric—83dOnsite · United States
Microarchitect / RTL Design - Memory Subsystem—83dOnsite · United States
Member of Technical Staff - Formal Verification—78dOnsite · United States
Member of Technical Staff - Physical Design—49dOnsite · United States
Chief Architect—5dOnsite · United States
Vice President of ASIC Engineering—5dOnsite · United States
Member of Technical Staff - Microarchitectural Validation—104dOnsite · India
Member of Technical Staff - Microarchitect / RTL Design—201dOnsite · United States

Pay & sponsorship

observed

0 of 16 roles post pay

No pay or sponsorship records yet

Signals

observed
Roles usually close inClose time · Learning · 0/10
Net roles · 7 daysVelocity · Learning · 2/7
New team signalNew teams · Learning · 2/37

Where they hire

United States15
India1

By team

ASIC1
Architecture1

Role mix

Software engineering2

Recent activity